New ATOLL Status Update, Aug 3rd, 2001Yes, we know, we have been quiet for a long, long time. The reason is simple: we worked on the chip! After problems with our industry partner last year, we needed some time to get back on our feet. We had to find a new fab for our chip, new partners for custom parts of the chip, etc. These problems have been solved in March this year. The ASIC Design Service Group of IMEC, Belgium has been contracted to prepare the chip layout, and a group of analog IC experts from the University of Kaiserslautern, Germany is designing some special, high-performance I/O cells for ATOLL. Some features you might like are:
We have never been so close to a working chip than at this time. We have entered the last design stage a few days ago, the layout generation of the ATOLL ASIC. You can have a look at a first plot of the layout here. You can see the I/O ring, together with the unplaced core and power rails. The ATOLL team |