sponsored by the IEEE CS TFCC BOF on High Speed Interconnects at SC99 When:   Tuesday, 11/16, 5.30 pm Where:  Oregon Convention Center,                777 NE Martin Luther King Jr. Boulevard.                Portland, Oregon                Rm 202/203 What:    Discussion on High Speed Interconnects. Topics will include but are not limited to: Myrinet, SCI, ATOLL NGIO, Future IO ... SIO VIA MPI 1, MPI 2 (multi devices, one sided communication, ...)

PRESENTATIONS ARE ONLINE

BOF: High Speed Interconnects for COTS Cluster Computing

Cluster Computing is one of the most important research platform for parallel computing in the recent years. With high volume production processors such as Intels PIII and now AMDs Athlon's CPU, high computation performance is available through these COTS at low costs.

However, dense packing of processing units is easier than increasing the performance of IO. Therefore, the performance gap to communication and I/O in general is steadily increasing.

While Gigabit/s media exist to transfer data, the current bottleneck is the interface between CPU and NIC. Improvement of main memory access, as well as inter node data transfer have been becoming a research platform lately (Rambus). Due to the availability of the PCI bus in most systems, network interface cards currently use this interface for communication, being limited by the 32/64 bits wide bus running at 33/66 Mhz, respectively.

Approaches to overcome this scenario are Future IO and NG IO which have merged to SIO recently. However PCI (-X) systems will continue to exist for at about 3-5 years.

High Speed Interconnects such as Myrinet, SCI and ATOLL are offering new programming paradigmas. We also expect to have a discussion on VIA, a specified industry standard.

As a result of this BOF we expect to have a higher transparency of current high speed interconnects and their software environments, also pointing out the demands of software develope rs.

Our speakers would first present results on:

Topics:

• 1) A comparison of high speed interconnects in the market: Myrinet, Servernet, SCI
• 2) Software models such as MPI-1, MPI-2, PVM, VIA, with details on their NIC specific implementation including zero-copy, DMA copy / PIO
• 3) Presentation of a new fully integrated high speed interconnect: ATOLL, a network on a chip.
• 4) Early experiences in One sided communication in MPI-2
• 5) Comments on SIO
• 6) User Level I/O devices

Speakers:

• Title: The Myrinet Technology Roadmap
  Speaker: Charles L. Seitz ( Myricom, I nc. )
  Abstract:
  Myricom recently introduced new interface products, the first steps in a series of developments that will include continued performance advances in interfaces, switches with hundreds of ports, and faster links on both copper and fiber.

• Title: The Score Environment on Myrinet
  Speaker: Yutaka Ishikawa ( Real World Computing Partnership )
  Abstract:
  

• Title: User Level Access to System Area Networks
  Speaker: Lambert Schaelicke (University of Utah, USA)
  Abstract:
  A major obstacle to scalable communication is the overhead introduced by the operating system. We will describe a set of hardware mechanisms that facilitate direct user-level access to high-performance I/O devices such as network interfaces without compromising security or system integrity.

• Title: ATOLL, a new, fully integrated Network in a single chip.
  Speaker: Ulrich Bruening, Markus Fischer ( University of Mannheim, Germany )
  Abstract:
  ATOLL is a new 64/32 bit, 66/33Mhz SAN which aims at the single chip solution. All existing components to build a large SAN are integrated into one single chip. This includes 4 independent host interfaces, 4 network interfaces and a 8x8 crossbar. ATOLL is a highly pipelined and optimized architecture, which is capable to deliver nearly peak performance even for small messages. System simulations indicate that one-way latency will start at about 2.5 us (ATOLL-API). Link utilization goes up to 90% of the peak bandwidth, resulting in more than 220 Mbyte/s for larger messages.

• Title: Implications of System-I/O for computational clusters
  Speaker: Alan Heirich ( Compaq )
  Abstract:
  ServerNet-II is Compaq's working implementation of System-I/O and will be entering beta deployment immediately after SC'99.

• Title: MPI for PC Clusters using VIA Interface Cards
  Speaker: Rolf Hempel (NEC)
  Abstract:
  As part of an NEC-internal research project, a PC SMP cluster using VIA-based NEC V1000 interface cards is under construction. The development of a dual-device MPI implementation and some performance issues regarding MPI-2 are presented.

Related BOF: The Task Force on Cluster Computing.

Contact: Markus Fischer  (last updated 11/08/1999)